277 lines
6.6 KiB
C
277 lines
6.6 KiB
C
/* ===========================================================================
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* uz80as, an assembler for the Zilog Z80 and several other microprocessors.
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*
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* Intel 8021.
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* Intel 8022.
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* Intel 8041.
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* Intel 8048.
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* ===========================================================================
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*/
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#include "pp.h"
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#include "err.h"
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#include "options.h"
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#include "uz80as.h"
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#include <stddef.h>
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/* pat:
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* a: expr
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* b: R0,R1,R2,R3,R4,R5,R6,R7
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* c: R0,R1
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* d: P1,P2
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* e: P4,P5,P6,P7
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* f: JB0,JB1,JB2,JB3,JB4,JB5,JB6,JB7
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*
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* gen:
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* .: output lastbyte
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* b: (op << 3) | lastbyte
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* c: op | lastbyte
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* d: lastbyte = op as 8 bit value
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* e: output op as word (no '.' should follow)
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* f: output lastbyte | ((op & 0x700) >> 3)
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* output op as 8 bit value
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* (no '.' should follow)
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* g: (op << 5) | lastbyte
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*/
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static const struct matchtab s_matchtab_i8048[] = {
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{ "NOP", "00.", 1, 0 },
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{ "ADD A,b", "68c0.", 1, 0 },
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{ "ADD A,@c", "60c0.", 1, 0 },
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{ "ADD A,#a", "03.d0.", 1, 0, "e8" },
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{ "ADDC A,b", "78c0.", 1, 0 },
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{ "ADDC A,@c", "70c0.", 1, 0 },
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{ "ADDC A,#a", "13.d0.", 1, 0, "e8" },
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{ "ANL A,b", "58c0.", 1, 0 },
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{ "ANL A,@c", "50c0.", 1, 0 },
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{ "ANL A,#a", "53.d0.", 1, 0, "e8" },
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{ "ANL BUS,#a", "98.d0.", 32, 0, "e8" },
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{ "ANL d,#a", "98c0.d1.", 4, 0, "e8" },
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{ "ANLD e,A", "9Cc0.", 1, 0 },
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{ "CALL a", "14f0", 1, 0 },
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{ "CLR A", "27.", 1, 0 },
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{ "CLR C", "97.", 1, 0 },
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{ "CLR F1", "A5.", 4, 0 },
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{ "CLR F0", "85.", 4, 0 },
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{ "CPL A", "37.", 1, 0 },
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{ "CPL C", "A7.", 1, 0 },
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{ "CPL F0", "95.", 4, 0 },
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{ "CPL F1", "B5.", 4, 0 },
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{ "DA A", "57.", 1, 0 },
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{ "DEC A", "07.", 1, 0 },
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{ "DEC b", "C8c0.", 4, 0 },
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{ "DIS I", "15.", 2, 0 },
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{ "DIS TCNTI", "35.", 2, 0 },
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{ "DJNZ b,a", "E8c0.d1.", 1, 0, "e8" },
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{ "EN DMA", "E5.", 64, 0 },
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{ "EN FLAGS", "F5.", 64, 0 },
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{ "EN I", "05.", 2, 0 },
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{ "EN TCNTI", "25.", 2, 0 },
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{ "ENT0 CLK", "75.", 32, 0 },
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{ "IN A,DBB", "22.", 64, 0 },
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{ "IN A,P0", "08.", 8, 0 },
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{ "IN A,d", "08c0.", 1, 0 },
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{ "INC A", "17.", 1, 0 },
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{ "INC b", "18c0.", 1, 0 },
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{ "INC @c", "10c0.", 1, 0 },
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{ "INS A,BUS", "08.", 32, 0 },
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{ "f a", "12g0.d1.", 4, 0, "e8" },
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{ "JC a", "F6.d0.", 1, 0, "e8" },
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{ "JF0 a", "B6.d0.", 4, 0, "e8" },
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{ "JF1 a", "76.d0.", 4, 0, "e8" },
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{ "JMP a", "04f0", 1, 0, "e11" },
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{ "JMPP @A", "B3.", 1, 0 },
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{ "JNC a", "E6.d0.", 1, 0, "e8" },
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{ "JNI a", "86.d0.", 32, 0, "e8" },
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{ "JNIBF a", "D6.d0.", 64, 0, "e8" },
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{ "JNT0 a", "26.d0.", 2, 0, "e8" },
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{ "JNT1 a", "46.d0.", 1, 0, "e8" },
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{ "JNZ a", "96.d0.", 1, 0, "e8" },
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{ "JOBF a", "86.d0.", 64, 0, "e8" },
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{ "JTF a", "16.d0.", 1, 0, "e8" },
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{ "JT0 a", "36.d0.", 2, 0, "e8" },
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{ "JT1 a", "56.d0.", 1, 0, "e8" },
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{ "JZ a", "C6.d0.", 1, 0, "e8" },
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{ "MOV A,#a", "23.d0.", 1, 0, "e8" },
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{ "MOV A,PSW", "C7.", 4, 0 },
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{ "MOV A,b", "F8c0.", 1, 0 },
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{ "MOV A,@c", "F0c0.", 1, 0 },
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{ "MOV A,T", "42.", 1, 0 },
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{ "MOV PSW,A", "D7.", 4, 0 },
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{ "MOV b,A", "A8c0.", 1, 0 },
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{ "MOV b,#a", "B8c0.d1.", 1, 0, "e8" },
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{ "MOV @c,A", "A0c0.", 1, 0 },
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{ "MOV @c,#a", "B0c0.d1.", 1, 0, "e8" },
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{ "MOV STS,A", "90.", 64, 0 },
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{ "MOV T,A", "62.", 1, 0 },
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{ "MOVD A,e", "0Cc0.", 1, 0 },
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{ "MOVD e,A", "3Cc0.", 1, 0 },
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{ "MOVP A,@A", "A3.", 1, 0 },
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{ "MOVP3 A,@A", "E3.", 4, 0 },
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{ "MOVX A,@c", "80c0.", 32, 0 },
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{ "MOVX @c,A", "90c0.", 32, 0 },
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{ "NOP", "00.", 1, 0 },
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{ "ORL A,b", "48c0.", 1, 0 },
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{ "ORL A,@c", "40c0.", 1, 0 },
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{ "ORL A,#a", "43.d0.", 1, 0, "e8" },
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{ "ORL BUS,#a", "88.d0.", 32, 0, "e8" },
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{ "ORL d,#a", "88c0.d1.", 4, 0, "e8" },
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{ "ORLD e,A", "8Cc0.", 1, 0 },
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{ "OUT DBB,A", "02.", 64, 0 },
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{ "OUTL BUS,A", "02.", 32, 0 },
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{ "OUTL P0,A", "90.", 8, 0 },
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{ "OUTL d,A", "38c0.", 1, 0 },
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{ "RAD", "80.", 16, 0 },
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{ "RET", "83.", 1, 0 },
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{ "RETR", "93.", 4, 0 },
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{ "RETI", "93.", 16, 0 },
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{ "RL A", "E7.", 1, 0 },
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{ "RLC A", "F7.", 1, 0 },
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{ "RR A", "77.", 1, 0 },
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{ "RRC A", "67.", 1, 0 },
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{ "SEL AN0", "85.", 16, 0 },
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{ "SEL AN1", "95.", 16, 0 },
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{ "SEL MB0", "E5.", 32, 0 },
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{ "SEL MB1", "F5.", 32, 0 },
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{ "SEL RB0", "C5.", 4, 0 },
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{ "SEL RB1", "D5.", 4, 0 },
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{ "STOP TCNT", "65.", 1, 0 },
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{ "STRT CNT", "45.", 1, 0 },
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{ "STRT T", "55.", 1, 0 },
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{ "SWAP A", "47.", 1, 0 },
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{ "XCH A,b", "28c0.", 1, 0 },
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{ "XCH A,@c", "20c0.", 1, 0 },
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{ "XCHD A,@c", "30c0.", 1, 0 },
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{ "XRL A,b", "D8c0.", 1, 0 },
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{ "XRL A,@c", "D0c0.", 1, 0 },
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{ "XRL A,#a", "D3.d0.", 1, 0, "e8" },
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{ NULL, NULL },
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};
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static const char *const bval[] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
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NULL };
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static const char *const cval[] = {
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"R0", "R1",
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NULL };
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static const char *const dval[] = {
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"", "P1", "P2",
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NULL };
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static const char *const eval[] = {
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"P4", "P5", "P6", "P7",
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NULL };
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static const char *const fval[] = {
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"JB0", "JB1", "JB2", "JB3", "JB4", "JB5", "JB6", "JB7",
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NULL };
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static const char *const *const valtab[] = {
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bval, cval, dval, eval, fval
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};
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static int match_i8048(char c, const char *p, const char **q)
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{
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int v;
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if (c <= 'f') {
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v = mreg(p, valtab[(int) (c - 'b')], q);
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} else {
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v = -1;
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}
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return v;
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}
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static int gen_i8048(int *eb, char p, const int *vs, int i, int savepc)
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{
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int b;
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b = *eb;
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switch (p) {
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case 'f': b |= ((vs[i] & 0x700) >> 3);
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genb(b, s_pline_ep);
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genb(vs[i], s_pline_ep);
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break;
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case 'g': b |= (vs[i] << 5);
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break;
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default:
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return -1;
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}
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*eb = b;
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return 0;
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}
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static int s_pat_char = 'b';
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static int s_pat_index;
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static void pat_char_rewind_i8048(int c)
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{
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s_pat_char = c;
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s_pat_index = 0;
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};
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static const char *pat_next_str_i8048(void)
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{
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const char *s;
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if (s_pat_char >= 'b' && s_pat_char <= 'f') {
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s = valtab[(int) (s_pat_char - 'b')][s_pat_index];
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if (s != NULL) {
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s_pat_index++;
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}
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} else {
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s = NULL;
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}
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return s;
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};
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const struct target s_target_i8041 = {
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.id = "i8041",
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.descr = "Intel 8041",
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.matcht = s_matchtab_i8048,
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.matchf = match_i8048,
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.genf = gen_i8048,
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.pat_char_rewind = pat_char_rewind_i8048,
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.pat_next_str = pat_next_str_i8048,
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.mask = 71
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};
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const struct target s_target_i8048 = {
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.id = "i8048",
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.descr = "Intel 8048",
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.matcht = s_matchtab_i8048,
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.matchf = match_i8048,
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.genf = gen_i8048,
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.pat_char_rewind = pat_char_rewind_i8048,
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.pat_next_str = pat_next_str_i8048,
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.mask = 39
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};
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const struct target s_target_i8021 = {
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.id = "i8021",
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.descr = "Intel 8021",
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.matcht = s_matchtab_i8048,
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.matchf = match_i8048,
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.genf = gen_i8048,
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.pat_char_rewind = pat_char_rewind_i8048,
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.pat_next_str = pat_next_str_i8048,
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.mask = 9
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};
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const struct target s_target_i8022 = {
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.id = "i8022",
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.descr = "Intel 8022",
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.matcht = s_matchtab_i8048,
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.matchf = match_i8048,
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.genf = gen_i8048,
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.pat_char_rewind = pat_char_rewind_i8048,
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.pat_next_str = pat_next_str_i8048,
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.mask = 27
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};
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